Mixed-Signal Design Engineer - Data Converters (DAC & ADC) - Mid & Senior Level (m/f/d)
Location: Aachen preferred | Full-time | Deep-Tech / Semiconductor Industry
About the Role
We are seeking a skilled and passionate Mixed-Signal Design Engineer with a strong background in the design and development of Analog-to-Digital Converters (ADCs) and Digital-to-Analog Converters (DACs). You will be involved in the complete development cycle-from specification and architecture to silicon validation-working at the forefront of data converter technology in advanced CMOS processes such as 22FDX and other FinFET/FD-SOI processes. As part of a highly experienced and collaborative analog/mixed-signal team, you will contribute to innovative converter IPs for use in communications, sensor interfaces, signal processing, and SoC products.
Responsibilities
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Solid understanding of ADC/DAC architectures, performance metrics, design trade-offs, and criteria for deciding which ADC/DAC designs are suitable for different applications.
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Solid understanding of and experience with building block circuits for measurement sub-systems such as band-gaps, CMOS bias generators, TIAs, op-amps, filters, switched-cap circuits, LDOs, ADCs, etc.
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Extensive hands-on experience with EDA design tools such as Cadence Virtuoso, preferably with a history of successful Tapeouts.
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Develop behavioral models and perform architecture-level trade-off analysis.
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Expertise in techniques for high-precision circuit design in the presence of large device mismatch and high supply noise.
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Collaborate closely with layout engineers to ensure layout matching and parasitic-aware design.
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Experience in C / MATLAB / Verilog modeling.
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Support silicon bring-up, lab validation, and debugging of first silicon.
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Document design and verification results, and support IP integration into customer products.
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Your Profile
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M.Sc. or Ph.D. in Electrical Engineering or related field.
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Hands-on experience in mixed-signal IC design, particularly ADC/DAC circuits.
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Strong understanding of analog design fundamentals (noise, matching, linearity, stability).
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Knowledge of system-level integration and SoC interfacing.
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Proficiency with Cadence design tools, Spectre, and behavioral modeling (Verilog-A, SystemVerilog-AMS).
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Full-custom analog layout techniques and the ability to take a design and do all the layout extract verification and sign-off.
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Experience with advanced CMOS process nodes.
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Good communication skills and ability to work in a collaborative team environment.
Qualifications
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Mid
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Level: 3
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5
years of relevant experience.
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Senior
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Level: 6+ years in
related field.
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MSc or PhD in Electrical Engineering, Microelectronics, or related field.
What We Offer
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A highly technical and impactful role in a fast
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growing semiconductor startup.
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Opportunity to work on next
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generation data converter ICs and
wireless communication systems.
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Competitive salary, equity (VESOP), and benefits.
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An open, international team culture that values innovation and ownership.
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Flexibility in work location and a focus on real results.
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